Strategic Director of System Validation Engineering for AI Products

• Astera Labs
• Vancouver, ca
• 2026-05-09

System Validation Engineer Specializing in AI Infrastructure Solutions

• Astera Labs
• Vancouver, ca
• 2026-05-09

Senior Analog Mixed-Signal Design Engineer Driving Innovation in ICs

• Astera Labs
• Toronto, ca
• 2026-05-09

Director of System Validation Engineering

• Astera Labs
• Vancouver, ca
• 2026-05-09

System Validation Engineer (Various Levels)

• Astera Labs
• Vancouver, ca
• 2026-05-09

Director of AI Fabric Validation & Systems

• Astera Labs
• Vancouver, ca
• 2026-05-09

Principal Analog Mixed-Signal Design Engineer

• Astera Labs
• Toronto, ca
• 2026-05-09

Principal Embedded Software Engineer - Analog Connectivity

• Astera Labs
• Toronto, ca
• 2026-05-09

Director of System Validation Engineering

• Astera Labs
• Vancouver, ca
• 2026-05-09

Technical Lead: PCIe Digital Design & IP Integration

• Astera Labs
• Toronto, ca
• 2026-05-09